Low-Power and Programmable Analog Circuitry for Wireless Sensors

Embedding networks of secure, wirelessly-connected sensors and actuators will help us to conscientiously manage our local and extended environments. One major challenge for this vision is to create networks of wireless sensor devices that provide maximal knowledge of their environment while using only the energy that is available within that environment. In this work, it is argued that the energy constraints in wireless sensor design are best addressed by incorporating analog signal processors. The low power-consumption of an analog signal processor allows persistent monitoring of multiple sensors while the device\u27s analog-to-digital converter, microcontroller, and transceiver are all in sleep mode. This dissertation describes the development of analog signal processing integrated circuits for wireless sensor networks. Specific technology problems that are addressed include reconfigurable processing architectures for low-power sensing applications, as well as the development of reprogrammable biasing for analog circuits

Speech Processing Front-end in Low-power Hardware

The objective of this work is to develop analog integrated circuits to serve as low-power auditory front-ends in signal processing systems. An analog front-end can be used for feature-extraction to reduce the requirements of the digital back-end, or to detect and call attention to compelling characteristics of a signal while the back-end is in sleep mode. Such a front-end should be advantageous for speech recognition, noise suppression, auditory scene analysis, hearing prostheses, biological modeling, or hardware-based event detection.;This work presents a spectral decomposition system, which consists of a bandpass filter bank with sub-band magnitude detection. The bandpass filter is low-power and each channel can be individually programmed for different quality factors and passband gains. The novel magnitude detector has a 68 decibel dynamic range, excellent tracking capability, and consumes less than a microwatt of power. The system, which was fabricated in a 0.18 micron process, consists of a 16-channel filter bank and a variety of sub-band computational elements

Continuous-Time Programming of Floating-Gate Transistors for Nonvolatile Analog Memory Arrays

Floating-gate (FG) transistors are a primary means of providing nonvolatile digital memory in standard CMOS processes, but they are also key enablers for large-scale programmable analog systems, as well. Such programmable analog systems are often designed for battery-powered and resource-constrained applications, which require the memory cells to program quickly and with low infrastructural overhead. To meet these needs, we present a four-transistor analog floating-gate memory cell that offers both voltage and current outputs and has linear programming characteristics. Furthermore, we present a simple programming circuit that forces the memory cell to converge to targets with 13.0 bit resolution. Finally, we demonstrate how to use the FG memory cell and the programmer circuit in array configurations. We show how to program an array in either a serial or parallel fashion and demonstrate the effectiveness of the array programming with an application of a bandpass filter array